First Integrated Circuit DU-TCC1209 of Dogus University has been delivered

Date : 28/1/2010 - 1/10/2010

Detail :

TUBITAK 106E139 Project

Project Acronym: TCC
Project Name: Tunable Multipurpose CMOS Classifier Circuits

Introduction:
In the everyday life, to define the rules used to recognize a certain sound, image or an analog data necessitates a sequence of complex processes and sometimes becomes an impossible task. However to develop well-defined software and hardware based criteria in the application of pattern recognition problems, is possible. The aim of classification can be defined as assigning an unknown object to a class of similar objects (or distinguishing objects having the same properties from those not possessing it). Classification is used in a huge variety of applications such as automatic target identification, artificial intelligence, artificial neural networks, analog to digital converters, quantization, medical diagnosis, statistics etc. Therefore nowadays, be it in the real or digital world, classification of data is becoming increasingly important.  But until recently, major work on classification was on developing algorithms used in software packages whereas, in many applications it is becoming more and more important to classify data much faster and in real time, entailing the need for hardware realization of these algorithms. The recent developments in electronic technology has created a perfect medium for the hardware realization of classifier structures which, in turn, will render many classifier application prospects feasible in real time.
 Short Description:
This project targets the design, realization, adaptation and application to real world problems of high speed, tunable, trainable new classifier circuits using CMOS technology. With this purpose in mind, in the hardware related part of the project the concept of 'core-cell, (core-circuit)' a single-input single-output classifier circuit which can be viewed as a building block for the whole system, has been introduced. In order for this core-cell to be adaptable, special care has been exercised to design it with externally tunable input-output-determining parameters. Then the architecture of a multi-input multi-output classifier consisting of many core-cells has been developed and decided upon. Both, the core-cell and the architecture have been realized at transistor level in CMOS technology, tested with measurements and simulations and improved with respect to low power consumption, small delay and low complexity; several wide-spectrum applications are shown to be feasible. Figure 1 shows the laboratory setup for performing the measurements on the circuit realizing the core cell.

In Figure 2 are shown the 3-D SPICE simulation results of a 2-D classifier (i.e. with two different types of data) using several core cells; different heights indicate data belonging to different classes.

After several test runs evaluating the performance of the core cell final decision has been made about the hardware realization of the circuit; the IC layout design phase, using AMS 0.35 m technology, has been carried out with the MENTOR software secured through project funds and submitted to Multi-Project Circuits in France for production. Once the realization is achieved the chip DU-TCC1209 containing 3 core-cells, 9 current conveyors and 3 buffers will be bench tested in several applications using a PCB designed for this purpose.

Figure 5. IC Die Photo

Figure 6. DU-TCC1209 IC Photo

Applications:
The following applications were proven and soft-tested: Data Classification, Character Recognition and Template Matching (both with error correction and noise filtering properties), Quantization, Pulse Width Modulation, Zero Crossing Detection, Ring Oscillator Realization. New applications are being investigated.

Publications:
During the research and development phase of the project several publications were made: five conference, two journal papers and a pending journal paper; further publications are expected about different applications.

Project Coordinator: Cem Göknar

Project Team: Shahram Minaei (Senior Researcher), Merih Yıldız and Engin Deniz (Researchers).

Project Sponsors: TUBITAK, Dogus University

Begins: 01/02/2007
Ends: 01/08/2009
Extended: 01/08/2010